IBM (NYSE:IBM) and Lam Research Corp. (NASDAQ:LRCX) have announced a five-year partnership focused on developing next-generation semiconductor processes and materials for logic scaling below the 1-nanometer threshold.
The collaboration will concentrate on creating new materials, fabrication techniques and High NA EUV lithography processes aimed at advancing IBM’s long-term logic scaling roadmap. The joint effort will explore advanced etch and deposition technologies, complex device architectures and new patterning approaches for next-generation interconnects and semiconductor devices.
IBM and Lam Research have worked together for more than a decade on semiconductor manufacturing innovations, contributing to major milestones including 7nm technology, nanosheet transistor architectures and EUV-based processes. IBM also introduced its 2nm node chip in 2021.
“Lam has been a critical partner to IBM for over a decade, contributing to key breakthroughs in logic scaling and device architecture such as nanosheet and the world’s first 2nm node chip,” said Mukesh Khare, GM of IBM Semiconductors and VP of hybrid cloud at IBM Research.
The research will take place at IBM’s facilities within the NY Creates Albany NanoTech Complex and will utilize Lam Research’s advanced semiconductor manufacturing tools. These include the company’s Aether dry resist technology, Kiyo and Akara etch platforms, and Striker and ALTUS Halo deposition systems.
Engineers from both companies will work to design and validate manufacturing process flows for nanosheet and nanostack device structures as well as backside power delivery technologies.
“As the industry enters a new era of 3D scaling, progress depends on rethinking how materials, processes, and lithography come together as a single, high-density system,” said Vahid Vahedi, chief technology and sustainability officer at Lam Research.